H.E. Ambassador Pham Quang Hieu
Consul General Ngo Trinh Ha
Mr. Shinsuke Okada
Mr. Okada is the Director for International Cooperation at the Ministry of Education, Culture, Sports, Science and Technology (MEXT), a position he has held since July 2024.
After earning a Master’s degree from the University of Tokyo, he gained work experience in a private-sector research laboratory before joining the Japan Science and Technology Agency (JST) in 2005.
Prior to his current position he has worked in various JST departments including industry-academia cooperation, public relations, strategic planning and management, and international cooperation.
His main focus has been on advancing international collaboration and promoting awareness of Japan’s science and technology initiatives.
Prof. Kazuya Masu
Topic:
Agile-Dynamic Society and the Future of Semiconductor Education and Collaboration
In today’s Agile-Dynamic Society, fundamental science, applied research, social implementation, and business innovation advance simultaneously.
The history of semiconductors shows that since around 1990, progress in unit-process development and integration has been realized through vertically ramped-up 300-mm production lines, demonstrating an agile-dynamic style of R&D and manufacturing.
Today, however, the focus has shifted beyond manufacturing. As the global semiconductor market expands—particularly in emerging economies across Asia and Africa—edge-oriented devices and diverse use-cases are gaining importance alongside traditional high-volume products such as GPUs, processors, and memories.
This transformation underscores the growing need for design capability, application-driven innovation, and business model development, rather than emphasizing fabrication technology alone.
My talk will highlight these perspectives and discuss how Japan and Vietnam can collaborate in semiconductor integrated-circuit education and ecosystem building to address future societal and market needs.
Biography
After receiving his Ph.D from Tokyo Institute of Technology, he built a distinguished career in electronic and integrated circuit technology at Tohoku University and Tokyo Tech. During this period, he made significant contributions to miniaturized MOSFET design, multilevel interconnect design and process technology, RF and high-speed CMOS integrated circuits, as well as CMOS-MEMS technology and its applications.
From 2018 to 2024, he served as President of Tokyo Tech, where he championed university reform, strengthened collaboration with industry, and fostered innovation. Among his major achievements, he led the successful integration of Tokyo Tech with Tokyo Medical and Dental University, culminating in the establishment of the Institute of Science Tokyo in October 2024.
Today, he heads the G-QuAT Center at AIST, working to pioneer new industries by combining quantum technology and AI, and to bring research outcomes into society and industry for the future of Japan.
Mr. Atsushi Arakawa
Topic:
Introduction of NEXUS (Networked Exchange, United Strength for Stronger Partnerships between Japan and ASEAN)
To mark the 50th anniversary of Japan-ASEAN friendship and cooperation in 2023, an initiative called NEXUS (Networked Exchange, United Strength for Stronger Partnerships between Japan and ASEAN) was launched to strengthen sustainable researcher networks between Japan and ASEAN through international joint research, human resource exchange, and development. Under this ASEAN-endorsed program, cooperation is carried out in fields that address the needs of both Japan and partner countries. In Vietnam, JST collaborates with the Ministry of Science and Technology of Vietnam to support international joint research in the field of semiconductors. JST’s expectations and plans for Japan-Vietnam semiconductor cooperation will also be presented.
Keywords: NEXUS, funding, international joint research, human resource exchange and development, semiconductors
Biography
Mr. Arakawa is currently engaged in promotion of two new programs: ASPIRE, which promotes the circulation of talent, and NEXUS, which enhances collaboration with ASEAN member states. After spending more than 13 years in the financial sector, he joined JST in 2003 and has since led various initiatives such as international cooperation, strategic planning, and science communication. His leadership experience spans JST, the Ministry of Education, Culture, Sports, Science and Technology (MEXT), and the New Energy and Industrial Technology Development Organization (NEDO), where he has held key positions including Director for International Cooperation at MEXT, Director of the JST Paris Office, and Director of the Department for the Promotion of Science in Society at JST.
Prof. Tetsuo Endoh
Topic:
Industry-Academia-Government Collaboration on Semiconductor at Tohoku University & The perspectives on Vietnam’s Institution – Tohoku University Bilateral Cooperation
For achieving ICT & AI Society, HPC (higher performance computer) is strongly demanded. Especially, the demand from AI system is so heavy. On the other hand, this HPC & AI data center consume big power. Therefore, many kinds of processors and memory face the dilemma between high performance and low power.
From above social demand, this invited talk reviews our recent progress in MRAM and low power AI processors with spintronics semiconductor technology. Our developed chips bring significant improvements in both power performance and circuit density in comparison with the latest conventional CMOS based memory and AI processors.
Therefore, the MRAM as NV-working memory and AI processors spintronics semiconductor technology are suitable for future HPC / AI systems that require ultra-low-power and high-performance computing at the same time.
Biography
Tetsuo Endoh graduated University of Tokyo in 1987 and received Ph. D degree from Tohoku University Graduate School of Engineering in 1995. He joined ULSI Research Center Toshiba Co. in 1987 and was engaged in both the R&D and the mass production of NAND Memory. He became a lecturer at the Research Institute of Electrical Communication, Tohoku University in 1995. He is a professor at the Department of Electrical Engineering, the Graduate School of Engineering, Tohoku University and director of the Center for Innovative Integrated Electronic Systems (CIES). His current interests are 3D structured device, novel memory, beyond-CMOS technology including spintronics, power-device and power electronics with GaN or SiC. He received the Fellow of The Japan Society of Applied Physics, 2012. He also received the 14th Prime Minister’s Award, 2016. He received 2017 National Invention Award for his contribution of the invent of 3D-NAND Memory technology. He was a Fellow of the IEEE from 2023.
Dr. Truong Gia Bao
Topic:
Vietnam’s Semiconductor Landscape and Future Roadmap
Mr. Richard Nakajima
Topic:
Vietnam–Japan Collaboration in Semiconductor Human Resource Development
The semiconductor industry is facing an urgent global challenge: a shortage of skilled human resources. Both Japan and Vietnam must address this issue to sustain growth and innovation. Japan has advanced industrial expertise but is constrained by demographic decline, while Vietnam possesses a young and dynamic workforce eager to contribute to high-tech industries. This talk highlights the importance of education programs, internships, and structured talent pipelines to bridge this gap. By leveraging bilateral academic–industry cooperation, Vietnam and Japan can create joint training models, scholarship opportunities, and internship frameworks that benefit both nations. Such collaboration not only addresses immediate workforce shortages but also builds a sustainable foundation for long-term growth, innovation, and shared prosperity in the global semiconductor ecosystem.
Keywords: Semiconductor Human Resource Development; Japan–Vietnam Collaboration; Talent Shortage; Education and Internship; Industry–Academia Partnership; Workforce Training; Cross-border Cooperation
Biography
Koichi “Richard” Nakajima is a semiconductor industry veteran with over 40 years of experience. He began his career as an engineer at NEC and later held key management positions at Chartered Semiconductor and Renesas Electronics, where he contributed to global business development and technology partnerships. Currently, he serves as an advisor to multiple companies, focusing on AI, semiconductor strategies, and international collaboration. He is the founder of Cubic Micro, a consulting firm dedicated to bridging Japan and ASEAN in semiconductors and AI, and of iXOS, a “Sound x AI x Art” venture. Richard is also co-founder of the “Semiconductor Group,” a long-standing industry alumni network in Japan, and actively engages in fostering cross-border partnerships, talent development, and ecosystem building in the semiconductor sector.
Prof. Pham Cong Kha
Topic:
Implementation of Secure AI System-on-Chip based on Multi-core RISC-V CPU and AI Accelerator for AI-IoMT Devices and Applications
This research aims to develop a secure System-on-Chip (SoC) with a multicore RISC-V CPU and provide related applications. This will be achieved through the design and implementation of an SoC equipped with AI and advanced cryptographic accelerators for secure edge devices. Specifically, the Japanese team will lead the IC design and manufacturing of the SoC with an embedded AI system. The Vietnamese team will collaborate on the IC design with the Japanese team and will be responsible for testing and verification as well as research and development of application software that uses the IC. Through this joint research between the two teams, a series of R&D processes, from the design and implementation to the evaluation of the SoC will be carried out. Upon the project’s completion, both teams aim to produce an SoC prototype and cultivate young researchers with a deep understanding of the entire semiconductor design and development process.
Biography
Prof. Pham Cong-Kha received the B.S., M.S., and Ph.D. degrees in electronics engineering from Sophia University, Tokyo, Japan. He is a Professor with the Department of Information and Network Engineering, The University of Electro-Communications (UEC), Tokyo, Japan. He is dedicated to teaching both undergraduate and postgraduate students. His research expertise lies in the design and implementation of hardware systems using FPGAs and integrated circuits. His current research portfolio includes projects on energy-harvesting power solutions, low-power data-centric sensor network systems, the development of super low-voltage devices, investigation of memory-based information detection systems, and the practical hardware implementation of systems using FPGAs and integrated circuits.
Prof. Kuroki Shinichiro
Topic:
Semiconductor Research and Education in Hiroshima University
Our activities on semiconductor research and education would be introduced. In our research facility, we have two super clean rooms for CMOS fabrications. We have many projects on semiconductor devices and circuits, and our students also join the projects. I’ll introduce these activities and also our new project, JST-Nexus project.
Biography
Shin-Ichiro Kuroki is Professor of Hiroshima University, and Vice-Director of Research Institute for Semiconductor Engineering (RISE), Hiroshima University, Japan. He received a Ph.D degree from Hiroshima University in 2002. From 2002 to 2005, he worked for the Research Center for Nanodevices and Systems of Hiroshima University as a Researcher for Industry-University-Government cooperation．In 2005, he joined the Graduate School of Engineering, Tohoku University, Japan, as an Assistant Professor. In 2012, he joined Hiroshima University as an Associate Professor. In 2019, he became a Professor at Hiroshima University. His current research interests are silicon carbide (SiC) CMOS integrated circuits, silicon thin film transistors and its applications.
Assoc. Prof. Le Duc Anh
Topic:
Building Global Talent Through Japan–Vietnam Collaboration in Advanced Electronics
In this talk, I will introduce our activities of the NEXUS program, a collaborative initiative between the University of Tokyo and Hanoi University of Science and Technology. The project is dedicated to cultivating the next generation of globally engaged researchers through joint Japan–Vietnam efforts in advanced electronics and student exchange. Research focuses on innovative materials such as GaN, β-Ga₂O₃, and SrTiO₃, as well as their applications in high-performance devices. Through these integrated activities, the NEXUS program seeks to advance material innovation while strengthening international human resource development in next-generation electronics.
Biography
Prof. Le Duc Anh is an Associate Professor at the University of Tokyo’s Graduate School of Engineering, specializing in the Department of Electrical Engineering and Information Systems. He earned his Ph.D. in Engineering from the University of Tokyo in 2016. He was also a researcher for PRESTO program of Japan Science and Technology Agency (JST) and a visiting scholar at Francis Bitter Magnet Laboratory, Massachusetts Institute of Technology (USA).
His research focuses on developing semiconductor materials and devices that integrate magnetism, superconductivity, and topology. The new Fe-based ferromagnetic semiconductors, which he successfully developed in his PhD work, are the firsts in III-V group to show ferromagnetism at room temperature. Currently, by utilizing nanoscale hybrid structures combining semiconductors, ferromagnets, topological materials and superconductors, his work aims to create ultra-low power electronics and foundational technologies for quantum information systems.
Assist. Prof. Nakamoto Trang
Topic:
Engineering Materials for Advanced Nitride Semiconductor HEMT Devices through Combined Theoretical Modeling and Experimental Fabrication
This joint research project brings together Japanese and Vietnamese universities to push the boundaries of high-electron mobility transistor (HEMT) technology using nitride semiconductors. The core objective is to overcome material, processing, and thermal challenges to optimize HEMTs for critical applications, such as 5G/6G communications, automotive power electronics, and wireless power transmission. The project will also explore novel applications in biomedical sensing.
Utilizing a blend of advanced experimental techniques (such as MBE and ALD) and AI-enhanced computational modeling, the collaboration aims to enhance electron mobility, reduce defects, and improve device reliability and efficiency. Beyond technical advancements, the project emphasizes significant human exchange through biannual workshops, research stays, and robust training programs, fostering a new generation of semiconductor experts and strengthening the academic and industrial ties between Japan and Vietnam. Ultimately, this research is set to drive economic growth and technological innovation, with broad impacts across communication, automotive, and healthcare sectors.
Biography
Trang Nakamoto (formerly Dang-Trang Nguyen), born in Vietnam in 1986, is an assistant professor at Ritsumeikan University. He earned his B.Eng. from Hanoi University of Science and Technology in Vietnam (2009), followed by a Master’s degree from Dongguk University in South Korea (2011) and a Ph.D. from Ritsumeikan University in Japan (2014). After two years working in industry, he returned to academia in 2017 as a senior researcher at R-GIRO. His current research focuses on the growth and evaluation of nitride semiconductor crystals. With over 45 peer-reviewed publications and more than 80 international conference presentations, his work bridges innovation and global collaboration in advanced materials science.
Mr. Tran Van Nam
VICE-RECTOR / DIRECTOR, FPT Polytechnic College – Ho Chi Minh City Campus
VICE PRESIDENT, Vietnam Semiconductor Human Resources Development Alliance
DIRECTOR, FPT Telecom – Saigon Branch
Prof. Nakamura Masakazu
Topic:
Total development of next-generation semiconductor thin-film technologies for energy and sensing devices
I will introduce our new Vietnam-Japan joint research project, which brings together experts in semiconductor materials and engineering from the Nara Institute of Science and Technology and VNU University of Science. These specialists focus on various fields related to materials and design/analysis methods. By combining their knowledge at the material, device, and chip levels, this project will collaboratively develop integrated technologies for next-generation semiconductor thin films based on functional nanostructures and apply them to energy conversion devices and sensing chips.
Biography
Prof. Masakazu Nakamura received a Ph.D. in Applied Physics from Osaka University in 1997. He initially worked as a research scientist at Toray Research Center, Inc. Then, he joined Chiba University in 2000 as an Associate Professor and moved to Nara Institute of Science and Technology in 2011 as a Full Professor. His current research fields are Organic Electronics, Organic Thermoelectric Materials, and Scanning Probe Microscopy. From 2017 to 2019, he served on the Board of Directors of the Japan Society of Applied Physics.
Prof. Masataka Higashiwaki
Topic:
Advances in gallium oxide devices
Gallium oxide (Ga2O3) had attracted little attention as a semiconductor for a long time. This situation has significantly changed in the past decade, and its research and development on materials and devices has become active mainly due to expectations for applications to next-generation power switching devices. Most of the distinguishing physical properties typified by the breakdown electric field are attributed to the extremely large bandgap of 4.5 eV. Another important feature is the existence of large single-crystal bulks that can be synthesized by melt growth. Thanks to worldwide enthusiastic efforts, many important achievements on Ga2O3 power field effect transistors (FETs) and diodes have been reported until now [1]. In this talk, I will give a brief overview of current status of research and development on Ga2O3 devices.
[1] M. Higashiwaki, IEEE Electron Devices Magazine 2, 42 (2024).
Biography
Masataka Higashiwaki received the B.S., M.S., and Ph.D. degrees all in solid-state physics from Osaka University, Japan, in 1994, 1996, and 1998, respectively. After a two-year postdoctoral fellow, he joined the National Institute of Information and Communications Technology (NICT) in 2000. From 2007 to 2010, he took a temporary leave from NICT and joined the University of California, Santa Barbara as a Project Scientist. He returned to NICT in 2010 and started pioneering research and development on gallium oxide (Ga2O3) electronics. In 2022, he joined the Department of Physics and Electronics at Osaka Metropolitan University as a Professor.
His Ga2O3 research is recognized by awards and honors such as the 2021, 2023, and 2024 Clarivate Highly Cited Researcher and the IEEE Fellow. He has authored or co-authored more than 150 papers in peer-reviewed journals and has given more than 150 invited talks at international conferences.
Prof. Pham Nam Hai
Topic:
From semiconductor to topological spintronics
I started my research career using molecular beam epitaxy for fundamental research in semiconductor spintronics, studying ferromagnetic semiconductors and ferromagnet/ semiconductor hybrid systems at the University of Tokyo. After starting my own research group at the former Tokyo Institute of Technology, I started a new research program on “topological spintronics”. I studied ferromagnet/topological insulator heterostructures, in which I demonstrated a giant spin Hall effect. Such a giant spin Hall effect is very promising for ultralow power and ultrafast magnetization switching, which helped me win a 5-year CREST project “Topology” from JST to focus on the applications of topological insulators to magnetic memory. At the same time, I established a strong collaboration relationship with the R&D unit of multinational semiconductor and magnetic storage companies, including Kioxia, TDK, Samsung, and Western Digital. My works showcase the feasibility of topological materials with the giant spin Hall effect for spin-orbit torque device applications.
Biography
Prof. Pham Nam Hai is the vice-head of electrical and electronic engineering at the Institute of Science Tokyo, with expertise in spintronics. His research interests include ferromagnetic nanoclusters, ferromagnetic semiconductors, ferromagnet/semiconductor hybrid systems, topological insulators, topological semimetals, and their applications to spintronics and AI. He has served as a representative member of the Japan Society of Applied Physics, on the editorial committee, and as an editor-in-chief of spintronics for the Magnetics Society of Japan (MSJ). He has served as a research director for various projects of the Japan Science and Technology Agency (JST), and has collaborated with the R&D unit of major semiconductor and magnetic storage companies, including Kioxia, TDK, Samsung, and Western Digital. He received the SSDM Young Researcher Award (‘09), the Ando Memorial Award (‘14), the Marubun Research Award (‘17), the German Innovation Award (Gottfried Wagener Prize) (‘19), Asian Scientist 100 (‘20), and the MSJ Outstanding Research Award (‘20).
Mr. Nguyen Hoang Dao
Topic:
From Vietnam to Japan — Building a Semiconductor Career: Pros and Cons
Japan’s reputation in electronics draws many aspiring engineers, including me, to build careers in its semiconductor industry. In this talk, I will share my path to becoming an MCU engineer and contributing to high-end MCU development at two world-leading MCU companies—Renesas (#1 in 2019) and Infineon (#1 in 2024)—especially strong in IoT and automotive. I will discuss the realities of working as a semiconductor engineer in Japan as an expatriate—the pros and cons I have observed among Japanese, Vietnamese, and other international engineers—highlighting differences in experience between a Japanese company (Renesas) and a European company operating in Japan (Infineon). I will also offer a concise view of the current semiconductor job market for design roles and practical advice for students aiming to become semiconductor engineers in Japan.
Biography
Nguyen Hoang Dao studied Electrical and Electronics Engineering at Ho Chi Minh University of Technology and earned an M.S. from Nagaoka University of Technology, Japan. In 2013, he moved to Japan through a twinning program between the two universities. His master’s research focused on the fundamentals of chaos in analog circuits and was published at an international conference. He completed a six-month internship at the NTT Research Center in Atsugi, Kanagawa. In 2017, Nguyen Hoang Dao joined Renesas (Musashi office), working across design verification and architecture engineers for IoT MCU IP. He led a team of four engineers contributing to integrated Arm CPU with AI/ML capability for IoT high-performance MCU which has application in Edge-AI. Subsequently, Nguyen Hoang Dao joined Infineon Technologies Japan (Shibuya office) from 2022 as a design verification engineer for Automotive MCU Peripheral IP, contributing to the release of the high-performance Automotive MCU which applicated for automotive zone control unit.
Assist. Prof. Nguyen Thi Van Anh
Topic:
From materials science research to R&D of integrated fast-writing, low-power Magnetoresistive Random-Access Memory
In the AI and IoT era, billions of devices and data centers are interacting continuously, with connected devices increasing exponentially. This phenomenon is creating a massive and unsustainable demand for compute energy. The critical challenge for the semiconductor industry is no longer just speed, but how to radically reduce power consumption in both processors and memory to achieve true energy-efficient computing.
In this talk, I will share my career experience on a transition from materials science research to the research and development of integrated fast-writing, low-power Magneto resistive Random-Access Memory (MRAM). I will introduce the work I’ve done on research and development of MRAM, a key non-volatile memory technology that is fundamentally changing the way we store data—and ultimately, the way we power the future of AI.
Biography
Dr. Nguyen Thi Van Anh an Assistant Professor of the Center for Science and Innovation in Spintronics, and concurrently, of the Center for Innovative Integrated Electronic Systems, Tohoku University, Japan from 2018. She was a lecturer of the Faculty of Physics, Hanoi National University of Education, Vietnam from 2006 to 2015. She did her post-doctoral research in the Graduate School of Engineering, Osaka University from 2015 to 2018.
She received the PhD. degree from Osaka University, Japan in 2015. Her research interests include the research and development of materials and devices toward applications in the low-power consumed, highly integrated spintronic devices.
She has awarded by the Ministry of Education and Training, Vietnam in 2008 for her participation as a Coordinator in the 39th International Physics Olympiad (IPho), held in Hanoi, Viet Nam. She has received various awards for best presentations at some domestic and international conferences.
Dr. Ngo Hoai Nguyen
Topic:
Terahertz Engineering for Beyond 6G Applications
Terahertz (THz) waves (300 GHz – 10 THz), which lie between the microwave and infrared bands, have attracted growing interest in science and technology. Offering very large bandwidths, THz communications are being considered for 6G and beyond. THz radiation can also penetrate many non-metallic materials, enabling non-destructive sensing and imaging applications. In this talk, I will present compact and efficient THz transceivers based on III–V resonant tunneling diodes (RTDs), and describe the integration of RTDs with all-dielectric passive devices toward 100-Gb/s on-chip interconnects. Finally, I will discuss collaborative projects in THz technology between Vietnamese and Japanese universities.
Biography
Nguyen H. Ngo received his B.E. and M.E. degrees in electrical engineering from International University (Vietnam National University), Ho Chi Minh City, Vietnam in 2015 and 2018, and the D.E. degree in electronic engineering from Ritsumeikan University, Shiga, Japan, in 2021.
His PhD research focused on the development of ultra-high-speed image sensors, specializing in the optimization of electrons’ trajectories in silicon. Since 2022, he has been a postdoctoral researcher with the Graduate School of Engineering Science, The University of Osaka, Japan. His duty is to develop an integrated terahertz system based on resonant tunneling diodes and silicon waveguide platforms for on-chip communication and sensing applications toward 6G and beyond.